 drivers/storage/ide/uniata/atacmd_map.h   |   2 +-
 drivers/storage/ide/uniata/bm_devs.h      | 221 ++++--------------------------
 drivers/storage/ide/uniata/bm_devs_decl.h |   2 -
 drivers/storage/ide/uniata/id_ata.cpp     |  26 +---
 drivers/storage/ide/uniata/id_init.cpp    |   1 -
 drivers/storage/ide/uniata/id_probe.cpp   |   4 +
 drivers/storage/ide/uniata/id_sata.cpp    |  49 +------
 drivers/storage/ide/uniata/uniata_ver.h   |  14 +-
 8 files changed, 46 insertions(+), 273 deletions(-)

diff --git a/drivers/storage/ide/uniata/atacmd_map.h b/drivers/storage/ide/uniata/atacmd_map.h
index 2b62e37258..9158bc8c5d 100644
--- a/drivers/storage/ide/uniata/atacmd_map.h
+++ b/drivers/storage/ide/uniata/atacmd_map.h
@@ -1,5 +1,5 @@
 
-// Build Version 0.46e8
+// Build Version 0.46e6
 
 
 UCHAR const AtaCommands48[256] = {
diff --git a/drivers/storage/ide/uniata/bm_devs.h b/drivers/storage/ide/uniata/bm_devs.h
index 5acef02a1d..1de82b2f6e 100644
--- a/drivers/storage/ide/uniata/bm_devs.h
+++ b/drivers/storage/ide/uniata/bm_devs.h
@@ -1,6 +1,6 @@
 /*++
 
-Copyright (c) 2002-2019 Alexandr A. Telyatnikov (Alter)
+Copyright (c) 2002-2016 Alexandr A. Telyatnikov (Alter)
 
 Module Name:
     bm_devs.h
@@ -64,37 +64,6 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 208F, 1022, 0x00, ATA_UDMA4, "AMD CS5535"       , CYRIX_35                        ),
     PCI_DEV_HW_SPEC_BM( 209a, 1022, 0x00, ATA_UDMA5, "AMD CS5536"       , 0                               ),
 
-    PCI_DEV_HW_SPEC_BM( 4380, 1022, 0x00, ATA_SA300, "AMD CS5536"       , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 4390, 1022, 0x00, ATA_SA300, "AMD SB7x0/SB8x0/SB9x0" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 4391, 1022, 0x00, ATA_SA300, "AMD SB7x0/SB8x0/SB9x0" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 4392, 1022, 0x00, ATA_SA300, "AMD SB7x0/SB8x0/SB9x0" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 4393, 1022, 0x00, ATA_SA300, "AMD SB7x0/SB8x0/SB9x0" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 4394, 1022, 0x00, ATA_SA300, "AMD SB7x0/SB8x0/SB9x0" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 4395, 1022, 0x00, ATA_SA300, "AMD SB8x0/SB9x0" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 43b6, 1022, 0x00, ATA_SA300, "AMD X399",	UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 43b5, 1022, 0x00, ATA_SA300, "AMD 300 Series",	UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 43b7, 1022, 0x00, ATA_SA300, "AMD 300 Series",	UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7800, 1022, 0x00, ATA_SA300, "AMD Hudson-2",    UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7801, 1022, 0x00, ATA_SA300, "AMD Hudson-2",    UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7802, 1022, 0x00, ATA_SA300, "AMD Hudson-2",    UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7803, 1022, 0x00, ATA_SA300, "AMD Hudson-2",    UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7804, 1022, 0x00, ATA_SA300, "AMD Hudson-2",    UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7900, 1022, 0x00, ATA_SA300, "AMD KERNCZ",      UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7901, 1022, 0x00, ATA_SA300, "AMD KERNCZ",      UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7902, 1022, 0x00, ATA_SA300, "AMD KERNCZ",      UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7903, 1022, 0x00, ATA_SA300, "AMD KERNCZ",      UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 7904, 1022, 0x00, ATA_SA300, "AMD KERNCZ",      UNIATA_SATA | UNIATA_AHCI),
-
-    PCI_DEV_HW_SPEC_BM( 0601, 1022, 0x00, ATA_SA300, "ASMedia ASM1060", UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0602, 1022, 0x00, ATA_SA300, "ASMedia ASM1060", UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0611, 1022, 0x00, ATA_SA300, "ASMedia ASM1061", UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0612, 1022, 0x00, ATA_SA300, "ASMedia ASM1062", UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0620, 1022, 0x00, ATA_SA300, "ASMedia ASM106x", UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0621, 1022, 0x00, ATA_SA300, "ASMedia ASM106x", UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0622, 1022, 0x00, ATA_SA300, "ASMedia ASM106x", UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0624, 1022, 0x00, ATA_SA300, "ASMedia ASM106x", UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0625, 1022, 0x00, ATA_SA300, "ASMedia ASM106x", UNIATA_SATA | UNIATA_AHCI),
-
     PCI_DEV_HW_SPEC_BM( 4349, 1002, 0x00, ATA_UDMA5, "ATI IXP200"       , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 4369, 1002, 0x00, ATA_UDMA6, "ATI IXP300"       , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 4376, 1002, 0x00, ATA_UDMA6, "ATI IXP400"       , 0                                       ),
@@ -128,26 +97,13 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 0007, 1103, 0x01, ATA_UDMA6, "HighPoint HPT371" , HPT372 | 0x00   | UNIATA_RAID_CONTROLLER),
     PCI_DEV_HW_SPEC_BM( 0008, 1103, 0x07, ATA_UDMA6, "HighPoint HPT374" , HPT374 | 0x00   | UNIATA_RAID_CONTROLLER),
 
-    /* some chips have marvell vendor id ? */
-    PCI_DEV_HW_SPEC_BM( 0620, 1103, 0x07, ATA_SA300, "HighPoint RocketRAID 620" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0620, 1b4b, 0x07, ATA_SA300, "HighPoint RocketRAID 620" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0622, 1103, 0x07, ATA_SA300, "HighPoint RocketRAID 622" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0622, 1b4b, 0x07, ATA_SA300, "HighPoint RocketRAID 622" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0640, 1103, 0x07, ATA_SA300, "HighPoint RocketRAID 640" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0640, 1b4b, 0x07, ATA_SA300, "HighPoint RocketRAID 640" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0644, 1103, 0x07, ATA_SA300, "HighPoint RocketRAID 644" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0644, 1b4b, 0x07, ATA_SA300, "HighPoint RocketRAID 644" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0641, 1103, 0x07, ATA_SA300, "HighPoint RocketRAID 640L" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0642, 1103, 0x07, ATA_SA300, "HighPoint RocketRAID 642L" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0645, 1103, 0x07, ATA_SA300, "HighPoint RocketRAID 644L" , UNIATA_SATA | UNIATA_AHCI),
-    
     PCI_DEV_HW_SPEC_BM( 1230, 8086, 0x00, ATA_WDMA2, "Intel PIIX"       , UNIATA_CHAN_TIMINGS                     ),
     PCI_DEV_HW_SPEC_BM( 7010, 8086, 0x00, ATA_WDMA2, "Intel PIIX3"      , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 7111, 8086, 0x00, ATA_UDMA2, "Intel PIIX3"      , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 7199, 8086, 0x00, ATA_UDMA2, "Intel PIIX4"      , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 84ca, 8086, 0x00, ATA_UDMA2, "Intel PIIX4"      , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 7601, 8086, 0x00, ATA_UDMA2, "Intel ICH0"       , 0                                       ),
-    
+
     PCI_DEV_HW_SPEC_BM( 2421, 8086, 0x00, ATA_UDMA4, "Intel ICH"        , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 2411, 8086, 0x00, ATA_UDMA4, "Intel ICH"        , 0                                       ),
 
@@ -189,12 +145,12 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
 
     PCI_DEV_HW_SPEC_BM( 2820, 8086, 0x00, ATA_SA300, "Intel ICH8"       , I6CH                                    ),
     PCI_DEV_HW_SPEC_BM( 2821, 8086, 0x00, ATA_SA300, "Intel ICH8"       , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 2822, 8086, 0x00, ATA_SA300, "Intel ICH8+"      , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 2822, 8086, 0x00, ATA_SA300, "Intel ICH8"       , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 2824, 8086, 0x00, ATA_SA300, "Intel ICH8"       , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 2825, 8086, 0x00, ATA_SA300, "Intel ICH8"       , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 2828, 8086, 0x00, ATA_SA300, "Intel ICH8M"      , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 2829, 8086, 0x00, ATA_SA300, "Intel ICH8M"      , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 282a, 8086, 0x00, ATA_SA300, "Intel ICH8M+"     , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 282a, 8086, 0x00, ATA_SA300, "Intel ICH8M"      , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 2850, 8086, 0x00, ATA_UDMA5, "Intel ICH8M"      , 0                                       ),
 
     PCI_DEV_HW_SPEC_BM( 2920, 8086, 0x00, ATA_SA300, "Intel ICH9"       , I6CH | UNIATA_SATA                      ),
@@ -212,12 +168,12 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 3a20, 8086, 0x00, ATA_SA300, "Intel ICH10"      , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 3a26, 8086, 0x00, ATA_SA300, "Intel ICH10"      , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 3a22, 8086, 0x00, ATA_SA300, "Intel ICH10"      , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 3a25, 8086, 0x00, ATA_SA300, "Intel ICH10"      , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 3a25, 8086, 0x00, ATA_SA300, "Intel ICH10"      , UNIATA_SATA | UNIATA_AHCI               ),
 
     PCI_DEV_HW_SPEC_BM( 3a00, 8086, 0x00, ATA_SA300, "Intel ICH10"      , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 3a06, 8086, 0x00, ATA_SA300, "Intel ICH10"      , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 3a02, 8086, 0x00, ATA_SA300, "Intel ICH10"      , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 3a05, 8086, 0x00, ATA_SA300, "Intel ICH10"      , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 3a05, 8086, 0x00, ATA_SA300, "Intel ICH10"      , UNIATA_SATA | UNIATA_AHCI               ),
 /*
     PCI_DEV_HW_SPEC_BM( ????, 8086, 0x00, ATA_SA300, "Intel ICH10"      , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( ????, 8086, 0x00, ATA_SA300, "Intel ICH10"      , I6CH2 | UNIATA_SATA                     ),
@@ -226,45 +182,23 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
 */
     PCI_DEV_HW_SPEC_BM( 3b20, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 3b21, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , I6CH2 | UNIATA_SATA                     ),
-    PCI_DEV_HW_SPEC_BM( 3b22, 8086, 0x00, ATA_SA300, "Intel Ibex Peak" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 3b23, 8086, 0x00, ATA_SA300, "Intel Ibex Peak" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 3b25, 8086, 0x00, ATA_SA300, "Intel Ibex Peak" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 3b22, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 3b23, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 3b25, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 3b26, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 3b28, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , I6CH | UNIATA_SATA                      ),
-    PCI_DEV_HW_SPEC_BM( 3b29, 8086, 0x00, ATA_SA300, "Intel Ibex Peak-M" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 3b2c, 8086, 0x00, ATA_SA300, "Intel Ibex Peak-M" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 3b29, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 3b2c, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 3b2d, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 3b2e, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , I6CH | UNIATA_SATA                      ),
-    PCI_DEV_HW_SPEC_BM( 3b2f, 8086, 0x00, ATA_SA300, "Intel Ibex Peak-M" , UNIATA_SATA | UNIATA_AHCI               ),
-
-    PCI_DEV_HW_SPEC_BM( 19b0, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19b1, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19b2, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19b3, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19b4, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19b5, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19b6, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19b7, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19be, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19bf, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19c0, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19c1, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19c2, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19c3, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19c4, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19c5, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19c6, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19c7, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19ce, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
-    PCI_DEV_HW_SPEC_BM( 19cf, 8086, 0x00, ATA_SA300, "Intel Denverton"  , UNIATA_SATA | UNIATA_AHCI                      ),
+    PCI_DEV_HW_SPEC_BM( 3b2f, 8086, 0x00, ATA_SA300, "Intel 5 Series/3400" , UNIATA_SATA | UNIATA_AHCI               ),
 
     PCI_DEV_HW_SPEC_BM( 1c00, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 1c01, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 1c02, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 1c03, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 1c04, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1c05, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1c06, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 1c04, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1c05, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 1c08, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 1c09, 8086, 0x00, ATA_SA300, "Intel Cougar Point"  , I6CH2 | UNIATA_SATA                     ),
 
@@ -272,106 +206,35 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 1d02, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 1d04, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 1d06, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 2826, 8086, 0x00, ATA_SA300, "Intel Patsburg+"      , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 2826, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 1d08, 8086, 0x00, ATA_SA300, "Intel Patsburg"      , I6CH2 | UNIATA_SATA                     ),
 
     PCI_DEV_HW_SPEC_BM( 1e00, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 1e01, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 1e02, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 1e03, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 1e04, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1e05, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1e06, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1e07, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 1e04, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e05, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e06, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e07, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 1e08, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 1e09, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH2 | UNIATA_SATA                     ),
-    PCI_DEV_HW_SPEC_BM( 1e0e, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1e0f, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-
-    PCI_DEV_HW_SPEC_BM( 1f22, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 1f23, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 1f24, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f25, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f26, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f27, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f2e, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f2f, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f32, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 1f33, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 1f34, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f35, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f36, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f37, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f3e, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 1f3f, 8086, 0x00, ATA_SA300, "Intel Avoton Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-
-    PCI_DEV_HW_SPEC_BM( 23a3, 8086, 0x00, ATA_SA300, "Intel Coleto Creek" , UNIATA_SATA | UNIATA_AHCI               ),
-                        
+    PCI_DEV_HW_SPEC_BM( 1e0e, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 1e0f, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI               ),
+
     PCI_DEV_HW_SPEC_BM( 8c00, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 8c01, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , I6CH | UNIATA_SATA                      ),
     PCI_DEV_HW_SPEC_BM( 8c02, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 8c03, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 8c04, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8c05, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8c06, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8c07, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
+    PCI_DEV_HW_SPEC_BM( 8c04, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 8c05, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 8c06, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 8c07, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI               ),
     PCI_DEV_HW_SPEC_BM( 8c08, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , I6CH2 | UNIATA_SATA                     ),
     PCI_DEV_HW_SPEC_BM( 8c09, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , I6CH2 | UNIATA_SATA                     ),
-    PCI_DEV_HW_SPEC_BM( 8c0e, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8c0f, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-
-    PCI_DEV_HW_SPEC_BM( 8c82, 8086, 0x00, ATA_SA300, "Intel Wildcat Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 8c83, 8086, 0x00, ATA_SA300, "Intel Wildcat Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 8c84, 8086, 0x00, ATA_SA300, "Intel Wildcat Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8c85, 8086, 0x00, ATA_SA300, "Intel Wildcat Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8c86, 8086, 0x00, ATA_SA300, "Intel Wildcat Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8c87, 8086, 0x00, ATA_SA300, "Intel Wildcat Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8c8e, 8086, 0x00, ATA_SA300, "Intel Wildcat Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8c8f, 8086, 0x00, ATA_SA300, "Intel Wildcat Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-
-    PCI_DEV_HW_SPEC_BM( 8d02, 8086, 0x00, ATA_SA300, "Intel Wellsburg Point" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 8d04, 8086, 0x00, ATA_SA300, "Intel Wellsburg Point" , UNIATA_SATA | UNIATA_AHCI   | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8d06, 8086, 0x00, ATA_SA300, "Intel Wellsburg Point" , UNIATA_SATA | UNIATA_AHCI   | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8d62, 8086, 0x00, ATA_SA300, "Intel Wellsburg Point" , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 8d64, 8086, 0x00, ATA_SA300, "Intel Wellsburg Point" , UNIATA_SATA | UNIATA_AHCI   | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8d66, 8086, 0x00, ATA_SA300, "Intel Wellsburg Point" , UNIATA_SATA | UNIATA_AHCI   | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 8d6e, 8086, 0x00, ATA_SA300, "Intel Wellsburg Point" , UNIATA_SATA | UNIATA_AHCI   | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 2823, 8086, 0x00, ATA_SA300, "Intel Wellsburg Point+" , UNIATA_SATA | UNIATA_AHCI  | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 2827, 8086, 0x00, ATA_SA300, "Intel Wellsburg Point+" , UNIATA_SATA | UNIATA_AHCI  | UNIATA_RAID_CONTROLLER),
-
-    PCI_DEV_HW_SPEC_BM( 9c02, 8086, 0x00, ATA_SA300, "Intel Lynx Point-LP" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 9c03, 8086, 0x00, ATA_SA300, "Intel Lynx Point-LP" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 9c04, 8086, 0x00, ATA_SA300, "Intel Lynx Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 9c05, 8086, 0x00, ATA_SA300, "Intel Lynx Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 9c06, 8086, 0x00, ATA_SA300, "Intel Lynx Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 9c07, 8086, 0x00, ATA_SA300, "Intel Lynx Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 9c0e, 8086, 0x00, ATA_SA300, "Intel Lynx Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 9c0f, 8086, 0x00, ATA_SA300, "Intel Lynx Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-
-    PCI_DEV_HW_SPEC_BM( 9d03, 8086, 0x00, ATA_SA300, "Intel Sunrise Point-LP" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( 9d05, 8086, 0x00, ATA_SA300, "Intel Sunrise Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( 9d07, 8086, 0x00, ATA_SA300, "Intel Sunrise Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-
-    PCI_DEV_HW_SPEC_BM( a102, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( a103, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( a105, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( a106, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( a107, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( a10f, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-
-    PCI_DEV_HW_SPEC_BM( a182, 8086, 0x00, ATA_SA300, "Intel Lewisburg" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( a186, 8086, 0x00, ATA_SA300, "Intel Lewisburg" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( a1d2, 8086, 0x00, ATA_SA300, "Intel Lewisburg" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( a1d6, 8086, 0x00, ATA_SA300, "Intel Lewisburg" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( a202, 8086, 0x00, ATA_SA300, "Intel Lewisburg" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( a206, 8086, 0x00, ATA_SA300, "Intel Lewisburg" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( a252, 8086, 0x00, ATA_SA300, "Intel Lewisburg" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( a256, 8086, 0x00, ATA_SA300, "Intel Lewisburg" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-
-    PCI_DEV_HW_SPEC_BM( a282, 8086, 0x00, ATA_SA300, "Intel Union Point" , UNIATA_SATA | UNIATA_AHCI               ),
-    PCI_DEV_HW_SPEC_BM( a286, 8086, 0x00, ATA_SA300, "Intel Union Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    PCI_DEV_HW_SPEC_BM( a28e, 8086, 0x00, ATA_SA300, "Intel Union Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
-    
+    PCI_DEV_HW_SPEC_BM( 8c0e, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI               ),
+    PCI_DEV_HW_SPEC_BM( 8c0f, 8086, 0x00, ATA_SA300, "Intel Lynx Point" , UNIATA_SATA | UNIATA_AHCI               ),
+
 //    PCI_DEV_HW_SPEC_BM( 3200, 8086, 0x00, ATA_SA150, "Intel 31244"      , UNIATA_SATA                             ),
     PCI_DEV_HW_SPEC_BM( 811a, 8086, 0x00, ATA_UDMA5, "Intel SCH"        , 0                                       ),
     PCI_DEV_HW_SPEC_BM( 2323, 8086, 0x00, ATA_SA300, "Intel DH98xxCC"   , UNIATA_SATA | UNIATA_AHCI                  ),
@@ -400,24 +263,9 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 6121, 11ab, 0x00, ATA_UDMA6, "Marvell 88SX6121" , UNIATA_SATA | UNIATA_AHCI       ),
     PCI_DEV_HW_SPEC_BM( 6141, 11ab, 0x00, ATA_UDMA6, "Marvell 88SX6141" , UNIATA_SATA | UNIATA_AHCI       ),
     PCI_DEV_HW_SPEC_BM( 6145, 11ab, 0x00, ATA_UDMA6, "Marvell 88SX6145" , UNIATA_SATA | UNIATA_AHCI       ),
-//    PCI_DEV_HW_SPEC_BM( 9123, 1b4b, 0x00, ATA_UDMA6, "Marvell 88SX9123" , UNIATA_SATA | UNIATA_AHCI       ),
+    PCI_DEV_HW_SPEC_BM( 9123, 1b4b, 0x00, ATA_UDMA6, "Marvell 88SX9123" , UNIATA_SATA | UNIATA_AHCI       ),
 /*    PCI_DEV_HW_SPEC_BM( 91a4, 1b4b, 0x00, ATA_UDMA6, "Marvell 88SE912x" , 0                                       ),*/
 
-    PCI_DEV_HW_SPEC_BM( 9120, 1b4b, 0x00, ATA_SA300, "Marvell 88SE912x" , UNIATA_SATA | UNIATA_AHCI       ),
-    PCI_DEV_HW_SPEC_BM( 9123, 1b4b, 0x11, ATA_SA300, "Marvell 88SE912x" , UNIATA_SATA | UNIATA_AHCI | UNIATA_AHCI_ALT_SIG),
-    PCI_DEV_HW_SPEC_BM( 9123, 1b4b, 0x00, ATA_SA300, "Marvell 88SE912x" , UNIATA_SATA | UNIATA_AHCI       ),// AHCI_Q_SATA2
-    PCI_DEV_HW_SPEC_BM( 9125, 1b4b, 0x00, ATA_SA300, "Marvell 88SE9125" , UNIATA_SATA | UNIATA_AHCI       ),
-    PCI_DEV_HW_SPEC_BM( 9128, 1b4b, 0x00, ATA_SA300, "Marvell 88SE9128" , UNIATA_SATA | UNIATA_AHCI | UNIATA_AHCI_ALT_SIG),
-    PCI_DEV_HW_SPEC_BM( 9130, 1b4b, 0x00, ATA_SA300, "Marvell 88SE9130" , UNIATA_SATA | UNIATA_AHCI | UNIATA_AHCI_ALT_SIG),
-    PCI_DEV_HW_SPEC_BM( 9172, 1b4b, 0x00, ATA_SA300, "Marvell 88SE9172" , UNIATA_SATA | UNIATA_AHCI       ),
-    PCI_DEV_HW_SPEC_BM( 9182, 1b4b, 0x00, ATA_SA300, "Marvell 88SE9182" , UNIATA_SATA | UNIATA_AHCI       ),
-    PCI_DEV_HW_SPEC_BM( 9183, 1b4b, 0x00, ATA_SA300, "Marvell 88SS9183" , UNIATA_SATA | UNIATA_AHCI       ),
-    PCI_DEV_HW_SPEC_BM( 91a0, 1b4b, 0x00, ATA_SA300, "Marvell 88SE91Ax" , UNIATA_SATA | UNIATA_AHCI       ),
-    PCI_DEV_HW_SPEC_BM( 9215, 1b4b, 0x00, ATA_SA300, "Marvell 88SE9215" , UNIATA_SATA | UNIATA_AHCI       ),
-    PCI_DEV_HW_SPEC_BM( 9220, 1b4b, 0x00, ATA_SA300, "Marvell 88SE9220" , UNIATA_SATA | UNIATA_AHCI | UNIATA_AHCI_ALT_SIG),
-    PCI_DEV_HW_SPEC_BM( 9230, 1b4b, 0x00, ATA_SA300, "Marvell 88SE9230" , UNIATA_SATA | UNIATA_AHCI | UNIATA_AHCI_ALT_SIG),
-    PCI_DEV_HW_SPEC_BM( 9235, 1b4b, 0x00, ATA_SA300, "Marvell 88SE9235" , UNIATA_SATA | UNIATA_AHCI       ),
-
     PCI_DEV_HW_SPEC_BM( 01bc, 10de, 0x00, ATA_UDMA5, "nVidia nForce"    , 0                               ),
     PCI_DEV_HW_SPEC_BM( 0065, 10de, 0x00, ATA_UDMA6, "nVidia nForce2"   , 0                               ),
     PCI_DEV_HW_SPEC_BM( 0085, 10de, 0x00, ATA_UDMA6, "nVidia nForce2 Pro",0                               ),
@@ -559,7 +407,6 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 3574, 105a, 0x00, ATA_SA150, "Promise PDC40718" , PRMIO | PRSATA2 | UNIATA_RAID_CONTROLLER | UNIATA_SATA),
     PCI_DEV_HW_SPEC_BM( 3570, 105a, 0x00, ATA_SA300, "Promise PDC40719" , PRMIO | PRSATA2 | UNIATA_RAID_CONTROLLER | UNIATA_SATA),
     PCI_DEV_HW_SPEC_BM( 3d73, 105a, 0x00, ATA_SA300, "Promise PDC40779" , PRMIO | PRSATA2 | UNIATA_RAID_CONTROLLER | UNIATA_SATA),
-    PCI_DEV_HW_SPEC_BM( 3781, 105a, 0x00, ATA_SA300, "Promise TX8660" , UNIATA_SATA | UNIATA_AHCI),
 
     PCI_DEV_HW_SPEC_BM( 0211, 1166, 0x00, ATA_UDMA2, "ServerWorks ROSB4", SWKS33  | UNIATA_NO_DPC                 ),
     PCI_DEV_HW_SPEC_BM( 0212, 1166, 0x92, ATA_UDMA5, "ServerWorks CSB5" , SWKS100                                 ),
@@ -633,10 +480,6 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 0181, 1039, 0x00, ATA_SA150, "SiS SATA 181"  , SISSATA   | UNIATA_SATA),
     PCI_DEV_HW_SPEC_BM( 0180, 1039, 0x00, ATA_SA150, "SiS SATA 180"  , SISSATA   | UNIATA_SATA),
 
-    PCI_DEV_HW_SPEC_BM( 1184, 1039, 0x00, ATA_SA300, "SiS 966"  , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 1185, 1039, 0x00, ATA_SA300, "SiS 968"  , UNIATA_SATA | UNIATA_AHCI),
-    PCI_DEV_HW_SPEC_BM( 0186, 1039, 0x00, ATA_SA300, "SiS 968"  , UNIATA_SATA | UNIATA_AHCI),
-
 /*    PCI_DEV_HW_SPEC_BM( 0586, 1106, 0x41, ATA_UDMA2, "VIA 82C586B"      , VIA33  | 0x00                           ),
     PCI_DEV_HW_SPEC_BM( 0586, 1106, 0x40, ATA_UDMA2, "VIA 82C586B"      , VIA33  | VIAPRQ                         ),
     PCI_DEV_HW_SPEC_BM( 0586, 1106, 0x02, ATA_UDMA2, "VIA 82C586B"      , VIA33  | 0x00                           ),
@@ -664,7 +507,6 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
     PCI_DEV_HW_SPEC_BM( 5372, 1106, 0x00, ATA_SA300, "VIA 8237"         , 0      | UNIATA_SATA                    ),
     PCI_DEV_HW_SPEC_BM( 7372, 1106, 0x00, ATA_SA300, "VIA 8237"         , 0      | UNIATA_SATA                    ),
     PCI_DEV_HW_SPEC_BM( 3349, 1106, 0x00, ATA_SA150, "VIA 8251"         , 0      | UNIATA_SATA | UNIATA_AHCI      ),
-    PCI_DEV_HW_SPEC_BM( 6287, 1106, 0x00, ATA_SA150, "VIA 8251"         , 0      | UNIATA_SATA | UNIATA_AHCI      ),
 
     PCI_DEV_HW_SPEC_BM( c693, 1080, 0x00, ATA_WDMA2, "Cypress 82C693"   ,0                                        ),
 
@@ -707,9 +549,6 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
 
     PCI_DEV_HW_SPEC_BM( 8013, 3388, 0x00, ATA_DMA,   "HiNT VXII EIDE"   , 0                                       ),
 
-    PCI_DEV_HW_SPEC_BM( a01c, 177d, 0x00, ATA_SA300, "ThunderX"   , UNIATA_SATA | UNIATA_AHCI    ),
-    PCI_DEV_HW_SPEC_BM( 0031, 1c36, 0x00, ATA_SA300, "Annapurna"  , UNIATA_SATA | UNIATA_AHCI    ),
-
     // Terminator
     PCI_DEV_HW_SPEC_BM( ffff, ffff, 0xff, BMLIST_TERMINATOR, NULL       , BMLIST_TERMINATOR )
 };
diff --git a/drivers/storage/ide/uniata/bm_devs_decl.h b/drivers/storage/ide/uniata/bm_devs_decl.h
index 15c6a72ec0..16070cd530 100644
--- a/drivers/storage/ide/uniata/bm_devs_decl.h
+++ b/drivers/storage/ide/uniata/bm_devs_decl.h
@@ -630,8 +630,6 @@ typedef struct _BUSMASTER_CONTROLLER_INFORMATION {
 #define UNIATA_AHCI             0x02000000
 #define UNIATA_NO80CHK          0x01000000
 #define UNIATA_CHAN_TIMINGS     0x00800000 /* controller has common timing settings for master/slave */
-#define UNIATA_AHCI_ALT_SIG     0x00400000 /* Some weird controllers do not return signature in
-			                      FIS receive area. Read it from PxSIG register */
 
 #define ATPOLD		0x0100
 
diff --git a/drivers/storage/ide/uniata/id_ata.cpp b/drivers/storage/ide/uniata/id_ata.cpp
index 4c8e15944e..26d9257ad0 100644
--- a/drivers/storage/ide/uniata/id_ata.cpp
+++ b/drivers/storage/ide/uniata/id_ata.cpp
@@ -7240,7 +7240,7 @@ IdeVerify(
     }
 
     KdPrint2((PRINT_PREFIX 
-                "IdeVerify: Total sectors %#I64x\n",
+                "IdeVerify: Total sectors %#x\n",
                 sectors));
 
     // Get starting sector number from CDB.
@@ -7304,7 +7304,6 @@ IdeVerify(
 
     if(!(statusByte & IDE_STATUS_ERROR)) {
         // Wait for interrupt.
-        UniataExpectChannelInterrupt(chan, TRUE);
         return SRB_STATUS_PENDING;
     }
     return SRB_STATUS_ERROR;
@@ -11246,7 +11245,6 @@ AtapiRegCheckDevValue(
     IN ULONG VendorID;
     IN ULONG DeviceID;
     IN ULONG SlotNumber;
-    IN ULONG HwFlags;
 
     ULONG val = Default;
 
@@ -11256,38 +11254,16 @@ AtapiRegCheckDevValue(
         VendorID   =  deviceExtension->DevID        & 0xffff;
         DeviceID   = (deviceExtension->DevID >> 16) & 0xffff;
         SlotNumber = deviceExtension->slotNumber;
-        HwFlags    = deviceExtension->HwFlags;
     } else {
         VendorID   = 0xffff;
         DeviceID   = 0xffff;
         SlotNumber = 0xffffffff;
-        HwFlags    = 0;
     }
 
     val = AtapiRegCheckDevLunValue(
         HwDeviceExtension, L"Parameters", chan, dev, Name, val);
 
     if(deviceExtension) {
-
-        if(HwFlags & UNIATA_SATA) {
-            swprintf(namev, L"\\SATA");
-            swprintf(namex, L"Parameters%s", namev);
-            val = AtapiRegCheckDevLunValue(
-                HwDeviceExtension, namex, chan, dev, Name, val);
-        }
-        if(HwFlags & UNIATA_AHCI) {
-            swprintf(namev, L"\\AHCI");
-            swprintf(namex, L"Parameters%s", namev);
-            val = AtapiRegCheckDevLunValue(
-                HwDeviceExtension, namex, chan, dev, Name, val);
-        }
-        if(!(HwFlags & (UNIATA_AHCI | UNIATA_AHCI))) {
-            swprintf(namev, L"\\PATA");
-            swprintf(namex, L"Parameters%s", namev);
-            val = AtapiRegCheckDevLunValue(
-                HwDeviceExtension, namex, chan, dev, Name, val);
-        }
-
         if(deviceExtension->AdapterInterfaceType == PCIBus) {
             // PCI
             swprintf(namev, L"\\IDE_%d", deviceExtension->DevIndex);
diff --git a/drivers/storage/ide/uniata/id_init.cpp b/drivers/storage/ide/uniata/id_init.cpp
index b9beb1bef0..2eaa98e696 100644
--- a/drivers/storage/ide/uniata/id_init.cpp
+++ b/drivers/storage/ide/uniata/id_init.cpp
@@ -1251,7 +1251,6 @@ for_ugly_chips:
 
             for(c=0; c<deviceExtension->NumberChannels; c++) {
                 chan = &deviceExtension->chan[c];
-                AtapiSetupLunPtrs(chan, deviceExtension, c);
                 IsPata = FALSE;
                 if(ChipFlags & ICH5) {
                     KdPrint2((PRINT_PREFIX "ICH5\n"));
diff --git a/drivers/storage/ide/uniata/id_probe.cpp b/drivers/storage/ide/uniata/id_probe.cpp
index dcb4225f00..0a36684d7f 100644
--- a/drivers/storage/ide/uniata/id_probe.cpp
+++ b/drivers/storage/ide/uniata/id_probe.cpp
@@ -148,7 +148,11 @@ UniataEnableIoPCI(
 /*
     Get PCI address by ConfigInfo and RID
 */
+#ifdef __REACTOS__
 ULONGIO_PTR
+#else
+ULONG
+#endif
 NTAPI
 AtapiGetIoRange(
     IN PVOID HwDeviceExtension,
diff --git a/drivers/storage/ide/uniata/id_sata.cpp b/drivers/storage/ide/uniata/id_sata.cpp
index 32c4c9008d..c39b0a83fa 100644
--- a/drivers/storage/ide/uniata/id_sata.cpp
+++ b/drivers/storage/ide/uniata/id_sata.cpp
@@ -1,6 +1,6 @@
 /*++
 
-Copyright (c) 2008-2019 Alexandr A. Telyatnikov (Alter)
+Copyright (c) 2008-2016 Alexandr A. Telyatnikov (Alter)
 
 Module Name:
     id_probe.cpp
@@ -895,7 +895,6 @@ UniataAhciDetect(
     ULONG version;
     ULONG i, n;
     ULONG PI;
-    //ULONG PI_ex_mask=0;
     ULONG CAP;
     ULONG CAP2;
     ULONG GHC, GHC0;
@@ -907,7 +906,6 @@ UniataAhciDetect(
     ULONG_PTR BaseMemAddress;
     BOOLEAN MemIo = FALSE;
     BOOLEAN found = FALSE;
-    ULONG BarId=5;
 
     KdPrint2((PRINT_PREFIX "  UniataAhciDetect:\n"));
 
@@ -915,19 +913,13 @@ UniataAhciDetect(
         KdPrint(("  AHCI excluded\n"));
         return FALSE;
     }
-    switch(deviceExtension->DevID) {
-    case 0xa01c0031:
-      KdPrint2((PRINT_PREFIX "  Cavium uses BAR(0)\n"));
-      BarId = 0;
-      break;
-    }
     BaseMemAddress = AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
-                          BarId, 0, 0x10);
+                            5, 0, 0x10);
     if(!BaseMemAddress) {
         KdPrint2((PRINT_PREFIX "  AHCI init failed - no IoRange\n"));
         return FALSE;
     }
-    if((*ConfigInfo->AccessRanges)[BarId].RangeInMemory) {
+    if((*ConfigInfo->AccessRanges)[5].RangeInMemory) {
         KdPrint2((PRINT_PREFIX "MemIo\n"));
         MemIo = TRUE;
     }
@@ -1009,7 +1001,6 @@ UniataAhciDetect(
             KdPrint2((PRINT_PREFIX "Channel %d excluded\n", n));
             deviceExtension->AHCI_PI &= ~((ULONG)1 << n);
             deviceExtension->AHCI_PI_mask &= ~((ULONG)1 << n);
-            //PI_ex_mask |= ((ULONG)1 << n);
         }
     }
     deviceExtension->AHCI_PI_mask = 
@@ -1020,36 +1011,10 @@ UniataAhciDetect(
     NumberChannels =
         max((CAP & AHCI_CAP_NOP_MASK)+1, n);
 
-    if(!PI && ((CAP & AHCI_CAP_NOP_MASK)+1)) {
-        /* Enable ports. 
-         * The spec says that BIOS sets up bits corresponding to
-         * available ports. On platforms where this information
-         * is missing, the driver can define available ports on its own.
-         */
-        KdPrint2((PRINT_PREFIX "PI=0 -> Enable ports (mask) %#x\n", deviceExtension->AHCI_PI_mask));
-        n = NumberChannels;
-        deviceExtension->AHCI_PI = ((ULONG)1 << n)-1;
-
-        if(deviceExtension->AHCI_PI_mask) {
-            // we have some forced port mask
-            PI = deviceExtension->AHCI_PI_mask;
-        } else {
-            // construct mask
-            PI = deviceExtension->AHCI_PI = (((ULONG)1 << n)-1);
-            deviceExtension->AHCI_PI_mask = (((ULONG)1 << n)-1);
-        }
-        KdPrint2((PRINT_PREFIX "Enable ports final PI %#x\n", PI));
-        UniataAhciWriteHostPort4(deviceExtension, IDX_AHCI_PI, PI);
-    }
-
     KdPrint2((PRINT_PREFIX "  CommandSlots %d\n", (CAP & AHCI_CAP_NCS_MASK)>>8 ));
     KdPrint2((PRINT_PREFIX "  Detected Channels %d / %d\n", NumberChannels, n));
 
     switch(deviceExtension->DevID) {
-    case 0x2361197b:
-        KdPrint2((PRINT_PREFIX "  JMicron JMB361 -> 1\n"));
-        NumberChannels = 1;
-        break;
     case ATA_M88SE6111:
         KdPrint2((PRINT_PREFIX "  Marvell M88SE6111 -> 1\n"));
         NumberChannels = 1;
@@ -1833,13 +1798,6 @@ UniataAhciSoftReset(
 
     KdDump(RCV_FIS, sizeof(chan->AhciCtlBlock->rcv_fis.rfis));
 
-    if(deviceExtension->HwFlags & UNIATA_AHCI_ALT_SIG) {
-        ULONG signature;
-        signature = UniataAhciReadChannelPort4(chan, IDX_AHCI_P_SIG);
-        KdPrint(("  alt sig: %#x\n", signature));
-        return signature;
-    }
-
     return UniataAhciUlongFromRFIS(RCV_FIS);
 
 } // end UniataAhciSoftReset()
@@ -2337,7 +2295,6 @@ UniataAhciEndTransaction(
                                 ((ULONGLONG)(RCV_FIS[7] & 0x0f) << 24);
     }
     AtaReq->WordsTransfered = AHCI_CL->bytecount/2;
-
 /*
     if(LunExt->DeviceFlags & DFLAGS_ATAPI_DEVICE) {
         KdPrint2(("RCV:\n"));
diff --git a/drivers/storage/ide/uniata/uniata_ver.h b/drivers/storage/ide/uniata/uniata_ver.h
index 28a985f1e4..2dc11c5d90 100644
--- a/drivers/storage/ide/uniata/uniata_ver.h
+++ b/drivers/storage/ide/uniata/uniata_ver.h
@@ -1,10 +1,10 @@
-#define UNIATA_VER_STR         "47"
-#define UNIATA_VER_DOT         0.47.0.0
+#define UNIATA_VER_STR         "46e8"
+#define UNIATA_VER_DOT         0.46.5.8
 #define UNIATA_VER_MJ          0
-#define UNIATA_VER_MN          47
-#define UNIATA_VER_SUB_MJ      0
-#define UNIATA_VER_SUB_MN      0
-#define UNIATA_VER_DOT_COMMA   0,47,0,0
-#define UNIATA_VER_DOT_STR     "0.47.0.0"
+#define UNIATA_VER_MN          46
+#define UNIATA_VER_SUB_MJ      5
+#define UNIATA_VER_SUB_MN      8
+#define UNIATA_VER_DOT_COMMA   0,46,5,8
+#define UNIATA_VER_DOT_STR     "0.46.5.8"
 #define UNIATA_VER_YEAR        2019
 #define UNIATA_VER_YEAR_STR    "2019"
