Index: drivers/storage/ide/uniata/bm_devs.h =================================================================== --- drivers/storage/ide/uniata/bm_devs.h (revision 56809) +++ drivers/storage/ide/uniata/bm_devs.h (working copy) @@ -273,8 +273,29 @@ #define ATA_CPT_S3 0x1c088086 #define ATA_CPT_S4 0x1c098086 +#define ATA_PBG_S1 0x1d008086 +#define ATA_PBG_AH1 0x1d028086 +#define ATA_PBG_R1 0x1d048086 +#define ATA_PBG_R2 0x1d068086 +#define ATA_PBG_R3 0x28268086 +#define ATA_PBG_S2 0x1d088086 + +#define ATA_PPT_S1 0x1e008086 +#define ATA_PPT_S2 0x1e018086 +#define ATA_PPT_AH1 0x1e028086 +#define ATA_PPT_AH2 0x1e038086 +#define ATA_PPT_R1 0x1e048086 +#define ATA_PPT_R2 0x1e058086 +#define ATA_PPT_R3 0x1e068086 +#define ATA_PPT_R4 0x1e078086 +#define ATA_PPT_S3 0x1e088086 +#define ATA_PPT_S4 0x1e098086 +#define ATA_PPT_R5 0x1e0e8086 +#define ATA_PPT_R6 0x1e0f8086 + #define ATA_I31244 0x32008086 #define ATA_ISCH 0x811a8086 +#define ATA_DH89XXCC 0x23238086 #define ATA_JMICRON_ID 0x197b #define ATA_JMB360 0x2360197b @@ -708,9 +729,9 @@ PCI_DEV_HW_SPEC_BM( 4349, 1002, 0x00, ATA_UDMA5, "ATI IXP200" , 0 ), PCI_DEV_HW_SPEC_BM( 4369, 1002, 0x00, ATA_UDMA6, "ATI IXP300" , 0 ), PCI_DEV_HW_SPEC_BM( 4376, 1002, 0x00, ATA_UDMA6, "ATI IXP400" , 0 ), - PCI_DEV_HW_SPEC_BM( 436e, 1002, 0x00, ATA_SA150, "ATI IXP300" , SIIMIO | UNIATA_SATA ), - PCI_DEV_HW_SPEC_BM( 4379, 1002, 0x00, ATA_SA150, "ATI IXP400" , SIIMIO | SIINOSATAIRQ | UNIATA_SATA ), - PCI_DEV_HW_SPEC_BM( 437a, 1002, 0x00, ATA_SA300, "ATI IXP400" , SIIMIO | SIINOSATAIRQ | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 436e, 1002, 0x00, ATA_SA150, "ATI IXP300" , SIIMIO | SIIBUG | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 4379, 1002, 0x00, ATA_SA150, "ATI IXP400" , SIIMIO | SIIBUG | SIINOSATAIRQ | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 437a, 1002, 0x00, ATA_SA300, "ATI IXP400" , SIIMIO | SIIBUG | SIINOSATAIRQ | UNIATA_SATA ), PCI_DEV_HW_SPEC_BM( 438c, 1002, 0x00, ATA_UDMA6, "ATI IXP600" , 0 ), PCI_DEV_HW_SPEC_BM( 4380, 1002, 0x00, ATA_SA150, "ATI IXP600" , UNIATA_SATA | UNIATA_AHCI ), PCI_DEV_HW_SPEC_BM( 439c, 1002, 0x00, ATA_UDMA6, "ATI IXP700" , 0 ), @@ -784,11 +805,17 @@ PCI_DEV_HW_SPEC_BM( 2920, 8086, 0x00, ATA_SA300, "Intel ICH9" , I6CH | UNIATA_SATA ), PCI_DEV_HW_SPEC_BM( 2926, 8086, 0x00, ATA_SA300, "Intel ICH9" , I6CH2 | UNIATA_SATA ), - PCI_DEV_HW_SPEC_BM( 2921, 8086, 0x00, ATA_SA300, "Intel ICH9" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 282a, 8086, 0x00, ATA_SA300, "Intel ICH9" , I6CH2 | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 2921, 8086, 0x00, ATA_SA300, "Intel ICH9" , UNIATA_SATA | UNIATA_AHCI ),/* ??? */ PCI_DEV_HW_SPEC_BM( 2922, 8086, 0x00, ATA_SA300, "Intel ICH9" , UNIATA_SATA | UNIATA_AHCI ), PCI_DEV_HW_SPEC_BM( 2923, 8086, 0x00, ATA_SA300, "Intel ICH9" , UNIATA_SATA | UNIATA_AHCI ), PCI_DEV_HW_SPEC_BM( 2925, 8086, 0x00, ATA_SA300, "Intel ICH9" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 2928, 8086, 0x00, ATA_SA300, "Intel ICH9M" , I6CH2 | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 2929, 8086, 0x00, ATA_SA300, "Intel ICH9M" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 292a, 8086, 0x00, ATA_SA300, "Intel ICH9M" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 292d, 8086, 0x00, ATA_SA300, "Intel ICH9M" , I6CH2 | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 3a20, 8086, 0x00, ATA_SA300, "Intel ICH10" , I6CH | UNIATA_SATA ), PCI_DEV_HW_SPEC_BM( 3a26, 8086, 0x00, ATA_SA300, "Intel ICH10" , I6CH2 | UNIATA_SATA ), PCI_DEV_HW_SPEC_BM( 3a22, 8086, 0x00, ATA_SA300, "Intel ICH10" , UNIATA_SATA | UNIATA_AHCI ), @@ -826,10 +853,30 @@ PCI_DEV_HW_SPEC_BM( 1c08, 8086, 0x00, ATA_SA300, "Intel Cougar Point" , I6CH2 | UNIATA_SATA ), PCI_DEV_HW_SPEC_BM( 1c09, 8086, 0x00, ATA_SA300, "Intel Cougar Point" , I6CH2 | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 1d00, 8086, 0x00, ATA_SA300, "Intel Patsburg" , I6CH | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 1d02, 8086, 0x00, ATA_SA300, "Intel Patsburg" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1d04, 8086, 0x00, ATA_SA300, "Intel Patsburg" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1d06, 8086, 0x00, ATA_SA300, "Intel Patsburg" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 2826, 8086, 0x00, ATA_SA300, "Intel Patsburg" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1d08, 8086, 0x00, ATA_SA300, "Intel Patsburg" , I6CH2 | UNIATA_SATA ), + + PCI_DEV_HW_SPEC_BM( 1e00, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 1e01, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 1e02, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1e03, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1e04, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1e05, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1e06, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1e07, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1e08, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH2 | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 1e09, 8086, 0x00, ATA_SA300, "Intel Panther Point" , I6CH2 | UNIATA_SATA ), + PCI_DEV_HW_SPEC_BM( 1e0e, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI ), + PCI_DEV_HW_SPEC_BM( 1e0f, 8086, 0x00, ATA_SA300, "Intel Panther Point" , UNIATA_SATA | UNIATA_AHCI ), + // PCI_DEV_HW_SPEC_BM( 3200, 8086, 0x00, ATA_SA150, "Intel 31244" , UNIATA_SATA ), - PCI_DEV_HW_SPEC_BM( 3200, 8086, 0x00, ATA_UDMA5, "Intel SCH" , I1CH ), + PCI_DEV_HW_SPEC_BM( 811a, 8086, 0x00, ATA_UDMA5, "Intel SCH" , I1CH ), + PCI_DEV_HW_SPEC_BM( 2323, 8086, 0x00, ATA_SA300, "Intel DH98xxCC" , UNIATA_SATA | UNIATA_AHCI ), - PCI_DEV_HW_SPEC_BM( 2360, 197b, 0x00, ATA_SA300, "JMB360" , UNIATA_SATA | UNIATA_AHCI ), PCI_DEV_HW_SPEC_BM( 2361, 197b, 0x00, ATA_UDMA6, "JMB361" , 0 ), Index: drivers/storage/ide/uniata/id_ata.cpp =================================================================== --- drivers/storage/ide/uniata/id_ata.cpp (revision 56809) +++ drivers/storage/ide/uniata/id_ata.cpp (working copy) @@ -3973,6 +3973,7 @@ } check_unknown: KdPrint2((PRINT_PREFIX " perform generic check\n")); + LunExt = chan->lun[chan->cur_cdev]; if (DmaTransfer) { if (!((dma_status = GetDmaStatus(deviceExtension, lChannel)) & BM_STATUS_INTR)) { KdPrint2((PRINT_PREFIX " DmaTransfer + !BM_STATUS_INTR (%x)\n", dma_status)); @@ -3986,6 +3987,11 @@ if(statusByte & IDE_STATUS_ERROR) { KdPrint2((PRINT_PREFIX " IDE_STATUS_ERROR -> our\n", statusByte)); OurInterrupt = INTERRUPT_REASON_UNEXPECTED; + } else + if ((statusByte & IDE_STATUS_DSC) && + (LunExt->DeviceFlags & DFLAGS_ATAPI_DEVICE) && + (dma_status == BM_STATUS_ACTIVE)) { + KdPrint2((PRINT_PREFIX " special case DMA + ATAPI + IDE_STATUS_DSC -> our\n", statusByte)); } else { return INTERRUPT_REASON_IGNORE; } @@ -4005,7 +4011,6 @@ AtapiStallExecution(1); } - LunExt = chan->lun[chan->cur_cdev]; /* if drive is busy it didn't interrupt */ /* the exception is DCS + BSY state of ATAPI devices */ KdPrint2((PRINT_PREFIX " getting status...\n")); @@ -8858,17 +8863,18 @@ } continue; } + BMList[i].AltInitMasterDev = (UCHAR)0xff; + if(GlobalConfig->AtDiskPrimaryAddressClaimed) PrimaryClaimed = TRUE; if(GlobalConfig->AtDiskSecondaryAddressClaimed) SecondaryClaimed = TRUE; - BMList[i].AltInitMasterDev = (UCHAR)0xff; - if(g_opt_Verbose) { _PrintNtConsole("Init standard Dual-channel PCI ATA controller:"); } + for(alt = 0; alt < (ULONG)(WinVer_WDM_Model ? 1 : 2) ; alt++) { for(c=0; c<2; c++) { Index: drivers/storage/ide/uniata/id_init.cpp =================================================================== --- drivers/storage/ide/uniata/id_init.cpp (revision 56809) +++ drivers/storage/ide/uniata/id_init.cpp (working copy) @@ -132,6 +132,9 @@ case ATA_SILICON_IMAGE_ID: if(ChipFlags & SIIBUG) { + /* work around errata in early chips */ + ConfigInfo->AlignmentMask = 0x1fff; + deviceExtension->MaximumDmaTransferLength = 15 * DEV_BSIZE; } if(ChipType != SIIMIO) { break; @@ -177,7 +180,8 @@ break; case ATA_INTEL_ID: /* New Intel PATA controllers */ - if(/*deviceExtension->DevID == 0x27df8086 || + if(g_opt_VirtualMachine != VM_VBOX && + /*deviceExtension->DevID == 0x27df8086 || deviceExtension->DevID == 0x269e8086 || deviceExtension->DevID == ATA_I82801HBM*/ ChipFlags & I1CH) { @@ -855,32 +859,6 @@ ULONG IoSize = 0; ULONG BaseMemAddress = 0; - /* - * vt6420/1 has problems talking to some drives. The following - * is based on the fix from Joseph Chan . - * - * When host issues HOLD, device may send up to 20DW of data - * before acknowledging it with HOLDA and the host should be - * able to buffer them in FIFO. Unfortunately, some WD drives - * send upto 40DW before acknowledging HOLD and, in the - * default configuration, this ends up overflowing vt6421's - * FIFO, making the controller abort the transaction with - * R_ERR. - * - * Rx52[2] is the internal 128DW FIFO Flow control watermark - * adjusting mechanism enable bit and the default value 0 - * means host will issue HOLD to device when the left FIFO - * size goes below 32DW. Setting it to 1 makes the watermark - * 64DW. - * - * http://www.reactos.org/bugzilla/show_bug.cgi?id=6500 - */ - - if(DeviceID == 0x3149 || DeviceID == 0x3249) { //vt6420 or vt6421 - KdPrint2((PRINT_PREFIX "VIA 642x FIFO\n")); - ChangePciConfig1(0x52, a | (1 << 2)); - } - switch(DeviceID) { case 0x3149: // VIA 6420 KdPrint2((PRINT_PREFIX "VIA 6420\n")); @@ -1040,11 +1018,17 @@ deviceExtension->HwFlags &= ~UNIATA_AHCI; /* if BAR(5) is IO it should point to SATA interface registers */ - BaseMemAddress = AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber, + if(deviceExtension->DevID == 0x28288086 && + pciData->u.type0.SubVendorID == 0x106b) { + KdPrint2((PRINT_PREFIX "Ignore BAR5 on ICH8M Apples\n")); + } else { + /* Skip BAR(5) on ICH8M Apples, system locks up on access. */ + BaseMemAddress = AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber, 5, 0, 0x10); - if(BaseMemAddress && (*ConfigInfo->AccessRanges)[5].RangeInMemory) { - KdPrint2((PRINT_PREFIX "MemIo\n")); - MemIo = TRUE; + if(BaseMemAddress && (*ConfigInfo->AccessRanges)[5].RangeInMemory) { + KdPrint2((PRINT_PREFIX "MemIo\n")); + MemIo = TRUE; + } } deviceExtension->BaseIoAddressSATA_0.Addr = BaseMemAddress; deviceExtension->BaseIoAddressSATA_0.MemIo = MemIo; @@ -1589,9 +1573,7 @@ ULONG slotNumber = deviceExtension->slotNumber; ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber; ULONG VendorID = deviceExtension->DevID & 0xffff; -#ifdef _DEBUG ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff; -#endif ULONG RevID = deviceExtension->RevID; // ULONG i; // BUSMASTER_CONTROLLER_INFORMATION* DevTypeInfo; @@ -2158,6 +2140,33 @@ if(ChipFlags & (UNIATA_SATA | VIASATA)) { /* enable PCI interrupt */ ChangePciConfig2(/*PCIR_COMMAND*/0x04, (a & ~0x0400)); + + /* + * vt6420/1 has problems talking to some drives. The following + * is based on the fix from Joseph Chan . + * + * When host issues HOLD, device may send up to 20DW of data + * before acknowledging it with HOLDA and the host should be + * able to buffer them in FIFO. Unfortunately, some WD drives + * send upto 40DW before acknowledging HOLD and, in the + * default configuration, this ends up overflowing vt6421's + * FIFO, making the controller abort the transaction with + * R_ERR. + * + * Rx52[2] is the internal 128DW FIFO Flow control watermark + * adjusting mechanism enable bit and the default value 0 + * means host will issue HOLD to device when the left FIFO + * size goes below 32DW. Setting it to 1 makes the watermark + * 64DW. + * + * http://www.reactos.org/bugzilla/show_bug.cgi?id=6500 + */ + + if(DeviceID == 0x3149 || DeviceID == 0x3249) { //vt6420 or vt6421 + KdPrint2((PRINT_PREFIX "VIA 642x FIFO\n")); + ChangePciConfig1(0x52, a | (1 << 2)); + } + break; } Index: drivers/storage/ide/uniata/id_probe.cpp =================================================================== --- drivers/storage/ide/uniata/id_probe.cpp (revision 56809) +++ drivers/storage/ide/uniata/id_probe.cpp (working copy) @@ -2364,6 +2364,7 @@ } chan = &(deviceExtension->chan[0]); + AtapiSetupLunPtrs(chan, deviceExtension, 0); deviceExtension->AdapterInterfaceType = deviceExtension->OrigAdapterInterfaceType @@ -2422,7 +2423,7 @@ portBase = AtapiRegCheckDevValue(deviceExtension, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"PortBase", portBase); irq = AtapiRegCheckDevValue(deviceExtension, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"Irq", irq); - for (i = 0; i < 4; i++) { + for (i = 0; i < deviceExtension->NumberLuns; i++) { // Zero device fields to ensure that if earlier devices were found, // but not claimed, the fields are cleared. deviceExtension->lun[i].DeviceFlags &= ~(DFLAGS_ATAPI_DEVICE | DFLAGS_DEVICE_PRESENT | DFLAGS_TAPE_DEVICE); @@ -2850,6 +2851,7 @@ AtapiSoftReset(chan, deviceNumber); if(!UniataAnybodyHome(HwDeviceExtension, lChannel, deviceNumber)) { + KdPrint2((PRINT_PREFIX "CheckDevice: nobody at home 1\n")); return 0; } statusByte = WaitOnBusy(chan); @@ -2905,6 +2907,7 @@ SelectDrive(chan, deviceNumber); if(!UniataAnybodyHome(HwDeviceExtension, lChannel, deviceNumber)) { + KdPrint2((PRINT_PREFIX "CheckDevice: nobody at home 2\n")); return 0; } Index: drivers/storage/ide/uniata/id_sata.cpp =================================================================== --- drivers/storage/ide/uniata/id_sata.cpp (revision 56809) +++ drivers/storage/ide/uniata/id_sata.cpp (working copy) @@ -1003,7 +1003,7 @@ PHW_CHANNEL chan = &deviceExtension->chan[lChannel]; //ULONG Channel = deviceExtension->Channel + lChannel; //ULONG hIS; - ULONG CI = 0; + ULONG CI=0; AHCI_IS_REG IS; ULONG SError; //SATA_SSTATUS_REG SStatus; @@ -1045,8 +1045,14 @@ UniataAhciWriteChannelPort4(chan, IDX_AHCI_P_IS, IS.Reg); if (timeout && (i >= timeout)) { + ULONG TFD; + SError = AtapiReadPort4(chan, IDX_SATA_SError); KdPrint((" AHCI: timeout, SError %#x\n", SError)); + + TFD = UniataAhciReadChannelPort4(chan, IDX_AHCI_P_TFD); + KdPrint2((" TFD %#x\n", TFD)); + return 0xff; } Index: drivers/storage/ide/uniata/idedma.rc =================================================================== --- drivers/storage/ide/uniata/idedma.rc (revision 56809) +++ drivers/storage/ide/uniata/idedma.rc (working copy) @@ -1,19 +1,30 @@ +#include + +#include #include "uniata_ver.h" -#define VERSION UNIATA_VER_DOT_COMMA -#define VERSION_STR "0." UNIATA_VER_STR +#undef VERSION +#define VERSION "0." UNIATA_VER_STR +#define VER_FILETYPE VFT_DRV +#define VER_FILESUBTYPE VFT2_DRV_SYSTEM +#undef VER_COMPANYNAME_STR +#define VER_COMPANYNAME_STR "AlterWare" +#define VER_FILEDESCRIPTION_STR "Universal IDE BusMaster (DMA) Miniport Driver" +#define VER_INTERNALNAME_STR "uniata.sys\0" +#define VER_ORIGINALFILENAME_STR "uniata.sys" +#define VER_LEGALCOPYRIGHT_YEARS "1999-" UNIATA_VER_YEAR_STR +#define VER_LEGALCOPYRIGHT_STR "Copyright \251 AlterWare" VER_LEGALCOPYRIGHT_YEARS +#undef VER_PRODUCTNAME_STR +#define VER_PRODUCTNAME_STR "UniATA" +#undef VER_PRODUCTVERSION +#define VER_PRODUCTVERSION UNIATA_VER_DOT_COMMA +#undef VER_PRODUCTVERSION_STR +#define VER_PRODUCTVERSION_STR VERSION +#undef VER_LEGALTRADEMARKS_STR -#define REACTOS_FILETYPE VFT_DRV -#define REACTOS_FILESUBTYPE VFT2_DRV_SYSTEM -#define REACTOS_FILEVERSION VERSION -#define REACTOS_PRODUCTVERSION VERSION -#define REACTOS_STR_COMPANY_NAME "AlterWare & ReactOS Development Team" -#define REACTOS_STR_FILE_DESCRIPTION "Universal IDE BusMaster (DMA) Miniport Driver" -#define REACTOS_STR_FILE_VERSION VERSION_STR -#define REACTOS_STR_INTERNAL_NAME "uniata.sys" -#define REACTOS_STR_ORIGINAL_FILENAME "uniata.sys" -#define REACTOS_STR_LEGAL_COPYRIGHT "Copyright 1999-" UNIATA_VER_YEAR_STR " AlterWare, Copyright 2010 ReactOS Team" -#define REACTOS_STR_PRODUCT_NAME "UniATA Driver for ReactOS" -#define REACTOS_STR_PRODUCT_VERSION VERSION_STR +#define VER_LANGNEUTRAL -#include +#include "common.ver" + +#include "uataerr.rc" + Index: drivers/storage/ide/uniata/uniata_ver.h =================================================================== --- drivers/storage/ide/uniata/uniata_ver.h (revision 56809) +++ drivers/storage/ide/uniata/uniata_ver.h (working copy) @@ -1,10 +1,10 @@ -#define UNIATA_VER_STR "41b2" -#define UNIATA_VER_DOT 0.41.2.2 +#define UNIATA_VER_STR "41b4" +#define UNIATA_VER_DOT 0.41.2.4 #define UNIATA_VER_MJ 0 #define UNIATA_VER_MN 41 #define UNIATA_VER_SUB_MJ 2 -#define UNIATA_VER_SUB_MN 2 -#define UNIATA_VER_DOT_COMMA 0,41,2,2 -#define UNIATA_VER_DOT_STR "0.41.2.2" -#define UNIATA_VER_YEAR 2011 -#define UNIATA_VER_YEAR_STR "2011" +#define UNIATA_VER_SUB_MN 4 +#define UNIATA_VER_DOT_COMMA 0,41,2,4 +#define UNIATA_VER_DOT_STR "0.41.2.4" +#define UNIATA_VER_YEAR 2012 +#define UNIATA_VER_YEAR_STR "2012"